1. Field of the Invention
The present invention relates to metal-oxide semiconductor field effect transistors (MOSFET). More particularly, the present invention relates to methods of measuring an effective channel length and an overlap length in a MOSFET having a minute line width.
2. Description of the Related Art
Recently, as information media, such as a computers, are widely used, methods of manufacturing semiconductor devices conforming to increasingly small design rules have been rapidly developed. The semiconductor devices from which cutting-edge information media devices are made require a rapid operation speed and a massive storage capacity. To meet these characteristics, a degree of integration, reliability, a response speed, and so on, of the semiconductor device have been improved.
In order to highly integrate the semiconductor device, it is necessary to have a design rule requiring the size of patterns in the semiconductor device be sufficiently reduced. Particularly, it is required to shorten a channel length of a gate in a MOSFET of the semiconductor device. Further, in order to form a highly integrated MOSFET, a process for verifying a capacity of the MOSFET having a sufficiently reduced channel length and a process for forming the MOSFET are essential.
To verify the MOSFET, parameters of elements in the MOSFET are accurately established. Examples of the parameters of the elements in the MOSFET may include an effective channel length, an overlap length, an overlap capacitance, and so on. The effective channel length and the overlap length are very important parameters relating to process monitoring, capacity of the MOSFET, formation of the MOSFET having reduced sizes, and so on.
Here, as the semiconductor device has been highly integrated, the effective channel length of the MOSFET has been significantly shortened. Thus, the overlap length between a source/drain and the gate becomes an important parameter. Therefore, when the very small MOSFET is modeled, accurate measurements of the effective channel length and the overlap length that have physical significances are required.
Examples of conventional methods of measuring the effective channel length and the overlap length include a current-voltage measuring method (hereinafter, referred to as an “I-V method”), a shift-and-ratio method, a capacitance-voltage measuring method (hereinafter, referred to as a “C-V method”), and so on.
However, in the I-V method and the shift-and-ratio method, since a halo or a pocket-well formation process is used currently, mobility of elements in a long channel is different from that of elements in a short channel, so that measurement accuracy may be low. Further, it is required to accurately measure resistances of the source/drain in the I-V method and the shift-and-ratio method. In contrast, since the C-V method does not have these problems, the effective channel length and the overlap length can be more accurately measured using the C-V method than it can be using the I-V method or the shift-and-ratio method.
A conventional method of measuring an effective channel length and an overlap length using a C-V method is disclosed in U.S. Pat. No. 6,514,778. According to the method in U.S. Pat. No. 6,514,778, a capacitance Cgc between a gate and a source/drain is measured to obtain an effective channel length and an overlap length. However, when a MOSFET has a minute gate line width, the effective channel length and the overlap length might not be accurately measured using the C-V method.
Particularly, in the super minute gate of the MOSFET, a capacitance measured in an accumulation region is not saturated, but is continuously changed in accordance with a gate bias. That is, the effective channel length and the overlap length are changed in accordance with the gate bias that is used for measuring the effective channel length and the overlap length.
Further, the capacitance measured for obtaining the effective channel length and the overlap length can include a parasitic capacitance. The parasitic capacitance has important influence on the determination of the effective channel length and the overlap length in the super minute MOSFET, leading to inaccuracies. However, the above conventional method does not take into account the significant consequences of the parasitic capacitance. As a result, the effective channel length and the overlap length measured using the conventional method may have low reliability.